1. Field of the Invention
The present invention relates to a wide band gap semiconductor device including a junction filed effect transistor (JFET).
2. Description of the Related Art
US 2006/0011924 A discloses a semiconductor device including a transistor cell region in which a JFET is disposed and an outer peripheral region in which a schottky diode and an outer peripheral withstand-voltage part are disposed. In the above-described semiconductor device, a trench is provided between the transistor cell region and the outer peripheral region and the trench is filled with an oxide layer, and thereby the transistor cell region and the outer peripheral region are isolated from each other.
When a semiconductor device has an isolation structure including a trench filled with an oxide layer, a breakdown may occur at an end portion of a schottky diode, and the oxide layer may breakdown. Especially, when the above-described isolation structure is applied to a silicon carbide (SiC) semiconductor device, electric field strength applied to an oxide layer is about three times greater than silicon (Si). Thus, the oxide layer may breakdown easily. In addition, a breakdown voltage of the semiconductor device depends on a breakdown voltage of the isolation structure including the trench filled with the oxide layer. Thus, even if a breakdown voltage of the JFET and a breakdown voltage of the schottky diode are increased, the breakdown voltage of the semiconductor device is difficult to be improved.
JP-A-2003-68760 discloses an SiC semiconductor device including a transistor cell region in which a JFET is disposed and an outer peripheral region in which a schottky barrier diode (JBS) is disposed. The JFET in the SiC semiconductor device includes an N− type drift layer. On the N− type drift layer, a P+ type first gate layer and an N+ type source region are disposed. The JFET has a trench penetrating the P+ type first gate layer and the N+ type source region to the N− type drift layer. In the trench, an N− type channel layer and a P+ type second gate region are disposed. In the JBS, the P+ type first gate layer is removed by etching so that the N− type drift layer is exposed. In the exposed N− drift layer, a P+ type impurity region is disposed. In addition, a schottky electrode being in contact with the P+ type impurity region and the N− type drift layer is disposed. In order to isolate the transistor cell region and the outer peripheral region, an oxide layer is disposed at a stepped portion of the P+ type first gate layer and the N+ type source region, that is, a portion from which the P+ type first gate layer and the N+ type source region are removed.
Even in a case where the stepped portion of the P+ type first gate layer and the N+ type source region are covered with the oxide layer for isolating the transistor cell region and the outer peripheral region, a breakdown may occur at an end portion of the JBS and the oxide layer may breakdown. A breakdown voltage of the semiconductor device depends on a breakdown voltage of the isolation structure. Thus, even if a breakdown voltage of the JFET and a breakdown voltage of the schottky diode are increased, the breakdown voltage of the semiconductor device is difficult to be improved.
US 2004/0212011 A discloses a semiconductor device including a metal-oxide semiconductor field-effect transistor (MOSFET) and a JBS. In the semiconductor device, the MOSFET surrounds the JBS. A P+ type body layer for electrically coupling a P type channel region (base region) with a source electrode in the MOSFET also functions as a P+ type impurity region of the JBS. In such a case, the MOSFET and the JBS are combined. Thus, an isolation is not required.
However, when the MOSFET and the JBS are combined, the P+ type body layer is required to have an ohmic contact with the source electrode. An impurity concentration of each portion may be set appropriately for the MOSFET and may be not appropriate for a diode. Thus, when electric current flows in the JBS, most of the electric current flows toward the P+ type body layer and little of the electric current flows toward the P+ type layer. Therefore, the electric current locally flows and a breakdown voltage of the semiconductor device is difficult to be improved.
In the above-described conventional art, SiC is taken as an exampled of a wide band gap semiconductor. However, the above-described issue may also occur in a semiconductor device including another wide gap semiconductor such as gallium nitride (GaN) and diamond.